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<div class="header">
  <div class="summary">
<a href="classunrolls_1_1gemm-members.html">List of all members</a> &#124;
<a href="#pub-static-methods">Static Public Member Functions</a>  </div>
  <div class="headertitle">
<div class="title">unrolls::gemm&lt; Scalar, isAdd &gt; Class Template Reference</div>  </div>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><h3>template&lt;typename Scalar, bool isAdd&gt;<br />
class unrolls::gemm&lt; Scalar, isAdd &gt;</h3>

<p>Unrolls for gemm kernel</p>
<p>isAdd: true =&gt; C += A*B, false =&gt; C -= A*B </p>
</div><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-static-methods"></a>
Static Public Member Functions</h2></td></tr>
<tr class="memitem:a95a5542ac5a4b915ff159162412477af"><td class="memTemplParams" colspan="2">template&lt;int64_t endM, int64_t counter, int64_t unrollN, int64_t currK, int64_t unrollK, int64_t numLoad, int64_t numBCast, bool rem&gt; </td></tr>
<tr class="memitem:a95a5542ac5a4b915ff159162412477af"><td class="memTemplItemLeft" align="right" valign="top">static EIGEN_ALWAYS_INLINE std::enable_if_t&lt;(counter &gt; 0)&gt;&#160;</td><td class="memTemplItemRight" valign="bottom"><a class="el" href="classunrolls_1_1gemm.html#a95a5542ac5a4b915ff159162412477af">aux_loadB</a> (Scalar *B_t, int64_t LDB, PacketBlock&lt; vec, EIGEN_ARCH_DEFAULT_NUMBER_OF_REGISTERS &gt; &amp;zmm, int64_t rem_=0)</td></tr>
<tr class="separator:a95a5542ac5a4b915ff159162412477af"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a43a89f69bb768c1e6a32e8b1bfbac5bc"><td class="memTemplParams" colspan="2">template&lt;bool isARowMajor, int64_t endM, int64_t endN, int64_t endK, int64_t counter, int64_t numLoad, int64_t numBCast, bool rem&gt; </td></tr>
<tr class="memitem:a43a89f69bb768c1e6a32e8b1bfbac5bc"><td class="memTemplItemLeft" align="right" valign="top">static EIGEN_ALWAYS_INLINE std::enable_if_t&lt;(counter &gt; 0)&gt;&#160;</td><td class="memTemplItemRight" valign="bottom"><a class="el" href="classunrolls_1_1gemm.html#a43a89f69bb768c1e6a32e8b1bfbac5bc">aux_microKernel</a> (Scalar *B_t, Scalar *A_t, int64_t LDB, int64_t LDA, PacketBlock&lt; vec, EIGEN_ARCH_DEFAULT_NUMBER_OF_REGISTERS &gt; &amp;zmm, int64_t rem_=0)</td></tr>
<tr class="separator:a43a89f69bb768c1e6a32e8b1bfbac5bc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a50fac3ad25423af95e989065a4afe665"><td class="memTemplParams" colspan="2">template&lt;int64_t endM, int64_t endN, int64_t counter&gt; </td></tr>
<tr class="memitem:a50fac3ad25423af95e989065a4afe665"><td class="memTemplItemLeft" align="right" valign="top">static EIGEN_ALWAYS_INLINE std::enable_if_t&lt;(counter &gt; 0)&gt;&#160;</td><td class="memTemplItemRight" valign="bottom"><a class="el" href="classunrolls_1_1gemm.html#a50fac3ad25423af95e989065a4afe665">aux_setzero</a> (PacketBlock&lt; vec, EIGEN_ARCH_DEFAULT_NUMBER_OF_REGISTERS &gt; &amp;zmm)</td></tr>
<tr class="separator:a50fac3ad25423af95e989065a4afe665"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af87dff80c9504d006bd225689684ca92"><td class="memTemplParams" colspan="2">template&lt;bool isARowMajor, int64_t unrollM, int64_t unrollN, int64_t endB, int64_t counter, int64_t numLoad&gt; </td></tr>
<tr class="memitem:af87dff80c9504d006bd225689684ca92"><td class="memTemplItemLeft" align="right" valign="top">static EIGEN_ALWAYS_INLINE std::enable_if_t&lt;(counter &gt; 0)&gt;&#160;</td><td class="memTemplItemRight" valign="bottom"><a class="el" href="classunrolls_1_1gemm.html#af87dff80c9504d006bd225689684ca92">aux_startBCastA</a> (Scalar *A_t, int64_t LDA, PacketBlock&lt; vec, EIGEN_ARCH_DEFAULT_NUMBER_OF_REGISTERS &gt; &amp;zmm)</td></tr>
<tr class="separator:af87dff80c9504d006bd225689684ca92"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3bef982cf8248a4c54ecf410a81a9ea4"><td class="memTemplParams" colspan="2">template&lt;int64_t unrollM, int64_t unrollN, int64_t endL, int64_t counter, bool rem&gt; </td></tr>
<tr class="memitem:a3bef982cf8248a4c54ecf410a81a9ea4"><td class="memTemplItemLeft" align="right" valign="top">static EIGEN_ALWAYS_INLINE std::enable_if_t&lt;(counter &gt; 0)&gt;&#160;</td><td class="memTemplItemRight" valign="bottom"><a class="el" href="classunrolls_1_1gemm.html#a3bef982cf8248a4c54ecf410a81a9ea4">aux_startLoadB</a> (Scalar *B_t, int64_t LDB, PacketBlock&lt; vec, EIGEN_ARCH_DEFAULT_NUMBER_OF_REGISTERS &gt; &amp;zmm, int64_t rem_=0)</td></tr>
<tr class="separator:a3bef982cf8248a4c54ecf410a81a9ea4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6a6e8189b9ed497da644be2b96d9d7aa"><td class="memTemplParams" colspan="2">template&lt;int64_t endM, int64_t endN, int64_t counter, bool rem&gt; </td></tr>
<tr class="memitem:a6a6e8189b9ed497da644be2b96d9d7aa"><td class="memTemplItemLeft" align="right" valign="top">static EIGEN_ALWAYS_INLINE std::enable_if_t&lt;(counter &gt; 0)&gt;&#160;</td><td class="memTemplItemRight" valign="bottom"><a class="el" href="classunrolls_1_1gemm.html#a6a6e8189b9ed497da644be2b96d9d7aa">aux_storeC</a> (Scalar *C_arr, int64_t LDC, PacketBlock&lt; vec, EIGEN_ARCH_DEFAULT_NUMBER_OF_REGISTERS &gt; &amp;zmm, int64_t rem_=0)</td></tr>
<tr class="separator:a6a6e8189b9ed497da644be2b96d9d7aa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad7d3bc461d87b6f9c11bddf2efceb9b0"><td class="memTemplParams" colspan="2">template&lt;int64_t endM, int64_t endN, int64_t counter, bool rem&gt; </td></tr>
<tr class="memitem:ad7d3bc461d87b6f9c11bddf2efceb9b0"><td class="memTemplItemLeft" align="right" valign="top">static EIGEN_ALWAYS_INLINE std::enable_if_t&lt;(counter &gt; 0)&gt;&#160;</td><td class="memTemplItemRight" valign="bottom"><a class="el" href="classunrolls_1_1gemm.html#ad7d3bc461d87b6f9c11bddf2efceb9b0">aux_updateC</a> (Scalar *C_arr, int64_t LDC, PacketBlock&lt; vec, EIGEN_ARCH_DEFAULT_NUMBER_OF_REGISTERS &gt; &amp;zmm, int64_t rem_=0)</td></tr>
<tr class="separator:ad7d3bc461d87b6f9c11bddf2efceb9b0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8dc4e486b1bb3045532453ea81ceaa81"><td class="memTemplParams" colspan="2">template&lt;int64_t endM, int64_t unrollN, int64_t currK, int64_t unrollK, int64_t numLoad, int64_t numBCast, bool rem&gt; </td></tr>
<tr class="memitem:a8dc4e486b1bb3045532453ea81ceaa81"><td class="memTemplItemLeft" align="right" valign="top">static EIGEN_ALWAYS_INLINE void&#160;</td><td class="memTemplItemRight" valign="bottom"><a class="el" href="classunrolls_1_1gemm.html#a8dc4e486b1bb3045532453ea81ceaa81">loadB</a> (Scalar *B_t, int64_t LDB, PacketBlock&lt; vec, EIGEN_ARCH_DEFAULT_NUMBER_OF_REGISTERS &gt; &amp;zmm, int64_t rem_=0)</td></tr>
<tr class="separator:a8dc4e486b1bb3045532453ea81ceaa81"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a01defc22a678a4106f87a430d354cc77"><td class="memTemplParams" colspan="2">template&lt;bool isARowMajor, int64_t endM, int64_t endN, int64_t endK, int64_t numLoad, int64_t numBCast, bool rem = false&gt; </td></tr>
<tr class="memitem:a01defc22a678a4106f87a430d354cc77"><td class="memTemplItemLeft" align="right" valign="top">static EIGEN_ALWAYS_INLINE void&#160;</td><td class="memTemplItemRight" valign="bottom"><a class="el" href="classunrolls_1_1gemm.html#a01defc22a678a4106f87a430d354cc77">microKernel</a> (Scalar *B_t, Scalar *A_t, int64_t LDB, int64_t LDA, PacketBlock&lt; vec, EIGEN_ARCH_DEFAULT_NUMBER_OF_REGISTERS &gt; &amp;zmm, int64_t rem_=0)</td></tr>
<tr class="separator:a01defc22a678a4106f87a430d354cc77"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7a2bcee680550522279c2348c1963a8b"><td class="memTemplParams" colspan="2">template&lt;bool isARowMajor, int64_t unrollM, int64_t unrollN, int64_t endB, int64_t numLoad&gt; </td></tr>
<tr class="memitem:a7a2bcee680550522279c2348c1963a8b"><td class="memTemplItemLeft" align="right" valign="top">static EIGEN_ALWAYS_INLINE void&#160;</td><td class="memTemplItemRight" valign="bottom"><a class="el" href="classunrolls_1_1gemm.html#a7a2bcee680550522279c2348c1963a8b">startBCastA</a> (Scalar *A_t, int64_t LDA, PacketBlock&lt; vec, EIGEN_ARCH_DEFAULT_NUMBER_OF_REGISTERS &gt; &amp;zmm)</td></tr>
<tr class="separator:a7a2bcee680550522279c2348c1963a8b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3ed9f390735d3bde1e716035ad2e4845"><td class="memTemplParams" colspan="2">template&lt;int64_t unrollM, int64_t unrollN, int64_t endL, bool rem&gt; </td></tr>
<tr class="memitem:a3ed9f390735d3bde1e716035ad2e4845"><td class="memTemplItemLeft" align="right" valign="top">static EIGEN_ALWAYS_INLINE void&#160;</td><td class="memTemplItemRight" valign="bottom"><a class="el" href="classunrolls_1_1gemm.html#a3ed9f390735d3bde1e716035ad2e4845">startLoadB</a> (Scalar *B_t, int64_t LDB, PacketBlock&lt; vec, EIGEN_ARCH_DEFAULT_NUMBER_OF_REGISTERS &gt; &amp;zmm, int64_t rem_=0)</td></tr>
<tr class="separator:a3ed9f390735d3bde1e716035ad2e4845"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3a3e7a4216625d99c91bdcb9c8c65046"><td class="memTemplParams" colspan="2">template&lt;int64_t endM, int64_t endN, bool rem = false&gt; </td></tr>
<tr class="memitem:a3a3e7a4216625d99c91bdcb9c8c65046"><td class="memTemplItemLeft" align="right" valign="top">static EIGEN_ALWAYS_INLINE void&#160;</td><td class="memTemplItemRight" valign="bottom"><a class="el" href="classunrolls_1_1gemm.html#a3a3e7a4216625d99c91bdcb9c8c65046">updateC</a> (Scalar *C_arr, int64_t LDC, PacketBlock&lt; vec, EIGEN_ARCH_DEFAULT_NUMBER_OF_REGISTERS &gt; &amp;zmm, int64_t rem_=0)</td></tr>
<tr class="separator:a3a3e7a4216625d99c91bdcb9c8c65046"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<h2 class="groupheader">Member Function Documentation</h2>
<a id="a95a5542ac5a4b915ff159162412477af"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a95a5542ac5a4b915ff159162412477af">&#9670;&nbsp;</a></span>aux_loadB()</h2>

<div class="memitem">
<div class="memproto">
<div class="memtemplate">
template&lt;typename Scalar , bool isAdd&gt; </div>
<div class="memtemplate">
template&lt;int64_t endM, int64_t counter, int64_t unrollN, int64_t currK, int64_t unrollK, int64_t numLoad, int64_t numBCast, bool rem&gt; </div>
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static EIGEN_ALWAYS_INLINE std::enable_if_t&lt;(counter &gt; 0)&gt; <a class="el" href="classunrolls_1_1gemm.html">unrolls::gemm</a>&lt; Scalar, isAdd &gt;::aux_loadB </td>
          <td>(</td>
          <td class="paramtype">Scalar *&#160;</td>
          <td class="paramname"><em>B_t</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">int64_t&#160;</td>
          <td class="paramname"><em>LDB</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">PacketBlock&lt; vec, EIGEN_ARCH_DEFAULT_NUMBER_OF_REGISTERS &gt; &amp;&#160;</td>
          <td class="paramname"><em>zmm</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">int64_t&#160;</td>
          <td class="paramname"><em>rem_</em> = <code>0</code>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
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</div><div class="memdoc">
<p>aux_loadB currK: current K</p>
<p>1-D unroll for(startM = 0; startM &lt; endM; startM++) </p>

</div>
</div>
<a id="a43a89f69bb768c1e6a32e8b1bfbac5bc"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a43a89f69bb768c1e6a32e8b1bfbac5bc">&#9670;&nbsp;</a></span>aux_microKernel()</h2>

<div class="memitem">
<div class="memproto">
<div class="memtemplate">
template&lt;typename Scalar , bool isAdd&gt; </div>
<div class="memtemplate">
template&lt;bool isARowMajor, int64_t endM, int64_t endN, int64_t endK, int64_t counter, int64_t numLoad, int64_t numBCast, bool rem&gt; </div>
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static EIGEN_ALWAYS_INLINE std::enable_if_t&lt;(counter &gt; 0)&gt; <a class="el" href="classunrolls_1_1gemm.html">unrolls::gemm</a>&lt; Scalar, isAdd &gt;::aux_microKernel </td>
          <td>(</td>
          <td class="paramtype">Scalar *&#160;</td>
          <td class="paramname"><em>B_t</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">Scalar *&#160;</td>
          <td class="paramname"><em>A_t</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">int64_t&#160;</td>
          <td class="paramname"><em>LDB</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">int64_t&#160;</td>
          <td class="paramname"><em>LDA</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">PacketBlock&lt; vec, EIGEN_ARCH_DEFAULT_NUMBER_OF_REGISTERS &gt; &amp;&#160;</td>
          <td class="paramname"><em>zmm</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">int64_t&#160;</td>
          <td class="paramname"><em>rem_</em> = <code>0</code>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
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</div><div class="memdoc">
<p>aux_microKernel</p>
<p>3-D unroll for(startM = 0; startM &lt; endM; startM++) for(startN = 0; startN &lt; endN; startN++) for(startK = 0; startK &lt; endK; startK++) </p>

</div>
</div>
<a id="a50fac3ad25423af95e989065a4afe665"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a50fac3ad25423af95e989065a4afe665">&#9670;&nbsp;</a></span>aux_setzero()</h2>

<div class="memitem">
<div class="memproto">
<div class="memtemplate">
template&lt;typename Scalar , bool isAdd&gt; </div>
<div class="memtemplate">
template&lt;int64_t endM, int64_t endN, int64_t counter&gt; </div>
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static EIGEN_ALWAYS_INLINE std::enable_if_t&lt;(counter &gt; 0)&gt; <a class="el" href="classunrolls_1_1gemm.html">unrolls::gemm</a>&lt; Scalar, isAdd &gt;::aux_setzero </td>
          <td>(</td>
          <td class="paramtype">PacketBlock&lt; vec, EIGEN_ARCH_DEFAULT_NUMBER_OF_REGISTERS &gt; &amp;&#160;</td>
          <td class="paramname"><em>zmm</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
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</div><div class="memdoc">
<p>aux_setzero</p>
<p>2-D unroll for(startM = 0; startM &lt; endM; startM++) for(startN = 0; startN &lt; endN; startN++) </p>

</div>
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<h2 class="memtitle"><span class="permalink"><a href="#af87dff80c9504d006bd225689684ca92">&#9670;&nbsp;</a></span>aux_startBCastA()</h2>

<div class="memitem">
<div class="memproto">
<div class="memtemplate">
template&lt;typename Scalar , bool isAdd&gt; </div>
<div class="memtemplate">
template&lt;bool isARowMajor, int64_t unrollM, int64_t unrollN, int64_t endB, int64_t counter, int64_t numLoad&gt; </div>
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static EIGEN_ALWAYS_INLINE std::enable_if_t&lt;(counter &gt; 0)&gt; <a class="el" href="classunrolls_1_1gemm.html">unrolls::gemm</a>&lt; Scalar, isAdd &gt;::aux_startBCastA </td>
          <td>(</td>
          <td class="paramtype">Scalar *&#160;</td>
          <td class="paramname"><em>A_t</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">int64_t&#160;</td>
          <td class="paramname"><em>LDA</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">PacketBlock&lt; vec, EIGEN_ARCH_DEFAULT_NUMBER_OF_REGISTERS &gt; &amp;&#160;</td>
          <td class="paramname"><em>zmm</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
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</div><div class="memdoc">
<p>aux_startBCastA</p>
<p>1-D unroll for(startB = 0; startB &lt; endB; startB++) </p>

</div>
</div>
<a id="a3bef982cf8248a4c54ecf410a81a9ea4"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a3bef982cf8248a4c54ecf410a81a9ea4">&#9670;&nbsp;</a></span>aux_startLoadB()</h2>

<div class="memitem">
<div class="memproto">
<div class="memtemplate">
template&lt;typename Scalar , bool isAdd&gt; </div>
<div class="memtemplate">
template&lt;int64_t unrollM, int64_t unrollN, int64_t endL, int64_t counter, bool rem&gt; </div>
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static EIGEN_ALWAYS_INLINE std::enable_if_t&lt;(counter &gt; 0)&gt; <a class="el" href="classunrolls_1_1gemm.html">unrolls::gemm</a>&lt; Scalar, isAdd &gt;::aux_startLoadB </td>
          <td>(</td>
          <td class="paramtype">Scalar *&#160;</td>
          <td class="paramname"><em>B_t</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">int64_t&#160;</td>
          <td class="paramname"><em>LDB</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">PacketBlock&lt; vec, EIGEN_ARCH_DEFAULT_NUMBER_OF_REGISTERS &gt; &amp;&#160;</td>
          <td class="paramname"><em>zmm</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">int64_t&#160;</td>
          <td class="paramname"><em>rem_</em> = <code>0</code>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
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<p>aux_startLoadB</p>
<p>1-D unroll for(startL = 0; startL &lt; endL; startL++) </p>

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<a id="a6a6e8189b9ed497da644be2b96d9d7aa"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a6a6e8189b9ed497da644be2b96d9d7aa">&#9670;&nbsp;</a></span>aux_storeC()</h2>

<div class="memitem">
<div class="memproto">
<div class="memtemplate">
template&lt;typename Scalar , bool isAdd&gt; </div>
<div class="memtemplate">
template&lt;int64_t endM, int64_t endN, int64_t counter, bool rem&gt; </div>
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static EIGEN_ALWAYS_INLINE std::enable_if_t&lt;(counter &gt; 0)&gt; <a class="el" href="classunrolls_1_1gemm.html">unrolls::gemm</a>&lt; Scalar, isAdd &gt;::aux_storeC </td>
          <td>(</td>
          <td class="paramtype">Scalar *&#160;</td>
          <td class="paramname"><em>C_arr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">int64_t&#160;</td>
          <td class="paramname"><em>LDC</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">PacketBlock&lt; vec, EIGEN_ARCH_DEFAULT_NUMBER_OF_REGISTERS &gt; &amp;&#160;</td>
          <td class="paramname"><em>zmm</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">int64_t&#160;</td>
          <td class="paramname"><em>rem_</em> = <code>0</code>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
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<p>aux_storeC</p>
<p>2-D unroll for(startM = 0; startM &lt; endM; startM++) for(startN = 0; startN &lt; endN; startN++) </p>

</div>
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<a id="ad7d3bc461d87b6f9c11bddf2efceb9b0"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ad7d3bc461d87b6f9c11bddf2efceb9b0">&#9670;&nbsp;</a></span>aux_updateC()</h2>

<div class="memitem">
<div class="memproto">
<div class="memtemplate">
template&lt;typename Scalar , bool isAdd&gt; </div>
<div class="memtemplate">
template&lt;int64_t endM, int64_t endN, int64_t counter, bool rem&gt; </div>
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static EIGEN_ALWAYS_INLINE std::enable_if_t&lt;(counter &gt; 0)&gt; <a class="el" href="classunrolls_1_1gemm.html">unrolls::gemm</a>&lt; Scalar, isAdd &gt;::aux_updateC </td>
          <td>(</td>
          <td class="paramtype">Scalar *&#160;</td>
          <td class="paramname"><em>C_arr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">int64_t&#160;</td>
          <td class="paramname"><em>LDC</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">PacketBlock&lt; vec, EIGEN_ARCH_DEFAULT_NUMBER_OF_REGISTERS &gt; &amp;&#160;</td>
          <td class="paramname"><em>zmm</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">int64_t&#160;</td>
          <td class="paramname"><em>rem_</em> = <code>0</code>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
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</div><div class="memdoc">
<p>aux_updateC</p>
<p>2-D unroll for(startM = 0; startM &lt; endM; startM++) for(startN = 0; startN &lt; endN; startN++) </p>

</div>
</div>
<a id="a8dc4e486b1bb3045532453ea81ceaa81"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a8dc4e486b1bb3045532453ea81ceaa81">&#9670;&nbsp;</a></span>loadB()</h2>

<div class="memitem">
<div class="memproto">
<div class="memtemplate">
template&lt;typename Scalar , bool isAdd&gt; </div>
<div class="memtemplate">
template&lt;int64_t endM, int64_t unrollN, int64_t currK, int64_t unrollK, int64_t numLoad, int64_t numBCast, bool rem&gt; </div>
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static EIGEN_ALWAYS_INLINE void <a class="el" href="classunrolls_1_1gemm.html">unrolls::gemm</a>&lt; Scalar, isAdd &gt;::loadB </td>
          <td>(</td>
          <td class="paramtype">Scalar *&#160;</td>
          <td class="paramname"><em>B_t</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">int64_t&#160;</td>
          <td class="paramname"><em>LDB</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">PacketBlock&lt; vec, EIGEN_ARCH_DEFAULT_NUMBER_OF_REGISTERS &gt; &amp;&#160;</td>
          <td class="paramname"><em>zmm</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">int64_t&#160;</td>
          <td class="paramname"><em>rem_</em> = <code>0</code>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
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<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
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<p>Loads next set of B into vector registers between each K unroll. </p>

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<a id="a01defc22a678a4106f87a430d354cc77"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a01defc22a678a4106f87a430d354cc77">&#9670;&nbsp;</a></span>microKernel()</h2>

<div class="memitem">
<div class="memproto">
<div class="memtemplate">
template&lt;typename Scalar , bool isAdd&gt; </div>
<div class="memtemplate">
template&lt;bool isARowMajor, int64_t endM, int64_t endN, int64_t endK, int64_t numLoad, int64_t numBCast, bool rem = false&gt; </div>
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
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          <td class="memname">static EIGEN_ALWAYS_INLINE void <a class="el" href="classunrolls_1_1gemm.html">unrolls::gemm</a>&lt; Scalar, isAdd &gt;::microKernel </td>
          <td>(</td>
          <td class="paramtype">Scalar *&#160;</td>
          <td class="paramname"><em>B_t</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">Scalar *&#160;</td>
          <td class="paramname"><em>A_t</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">int64_t&#160;</td>
          <td class="paramname"><em>LDB</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">int64_t&#160;</td>
          <td class="paramname"><em>LDA</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">PacketBlock&lt; vec, EIGEN_ARCH_DEFAULT_NUMBER_OF_REGISTERS &gt; &amp;&#160;</td>
          <td class="paramname"><em>zmm</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">int64_t&#160;</td>
          <td class="paramname"><em>rem_</em> = <code>0</code>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
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<p>Generates a microkernel for gemm (row-major) with unrolls {1,2,4,8}x{U1,U2,U3} to compute C -= A*B. A matrix can be row/col-major. B matrix is assumed row-major.</p>
<p>isARowMajor: is A row major endM: Number registers per row endN: Number of rows endK: Loop unroll for K. numLoad: Number of registers for loading B. numBCast: Number of registers for broadcasting A.</p>
<p>Ex: microkernel&lt;isARowMajor,0,3,0,4,0,4,6,2&gt;: 8x48 unroll (24 accumulators), k unrolled 4 times, 6 register for loading B, 2 for broadcasting A.</p>
<p>Note: Ideally the microkernel should not have any register spilling. The avx instruction counts should be:</p><ul>
<li>endK*endN vbroadcasts{s,d}</li>
<li>endK*endM vmovup{s,d}</li>
<li>endK*endN*endM FMAs</li>
</ul>
<p>From testing, there are no register spills with clang. There are register spills with GNU, which causes a performance hit. </p>

</div>
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<a id="a7a2bcee680550522279c2348c1963a8b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a7a2bcee680550522279c2348c1963a8b">&#9670;&nbsp;</a></span>startBCastA()</h2>

<div class="memitem">
<div class="memproto">
<div class="memtemplate">
template&lt;typename Scalar , bool isAdd&gt; </div>
<div class="memtemplate">
template&lt;bool isARowMajor, int64_t unrollM, int64_t unrollN, int64_t endB, int64_t numLoad&gt; </div>
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
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          <td class="memname">static EIGEN_ALWAYS_INLINE void <a class="el" href="classunrolls_1_1gemm.html">unrolls::gemm</a>&lt; Scalar, isAdd &gt;::startBCastA </td>
          <td>(</td>
          <td class="paramtype">Scalar *&#160;</td>
          <td class="paramname"><em>A_t</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">int64_t&#160;</td>
          <td class="paramname"><em>LDA</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">PacketBlock&lt; vec, EIGEN_ARCH_DEFAULT_NUMBER_OF_REGISTERS &gt; &amp;&#160;</td>
          <td class="paramname"><em>zmm</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
</table>
</div><div class="memdoc">
<p>Use numBCast registers for broadcasting A at start of microKernel </p>

</div>
</div>
<a id="a3ed9f390735d3bde1e716035ad2e4845"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a3ed9f390735d3bde1e716035ad2e4845">&#9670;&nbsp;</a></span>startLoadB()</h2>

<div class="memitem">
<div class="memproto">
<div class="memtemplate">
template&lt;typename Scalar , bool isAdd&gt; </div>
<div class="memtemplate">
template&lt;int64_t unrollM, int64_t unrollN, int64_t endL, bool rem&gt; </div>
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
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          <td class="memname">static EIGEN_ALWAYS_INLINE void <a class="el" href="classunrolls_1_1gemm.html">unrolls::gemm</a>&lt; Scalar, isAdd &gt;::startLoadB </td>
          <td>(</td>
          <td class="paramtype">Scalar *&#160;</td>
          <td class="paramname"><em>B_t</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">int64_t&#160;</td>
          <td class="paramname"><em>LDB</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">PacketBlock&lt; vec, EIGEN_ARCH_DEFAULT_NUMBER_OF_REGISTERS &gt; &amp;&#160;</td>
          <td class="paramname"><em>zmm</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">int64_t&#160;</td>
          <td class="paramname"><em>rem_</em> = <code>0</code>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
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<p>Use numLoad registers for loading B at start of microKernel </p>

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<a id="a3a3e7a4216625d99c91bdcb9c8c65046"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a3a3e7a4216625d99c91bdcb9c8c65046">&#9670;&nbsp;</a></span>updateC()</h2>

<div class="memitem">
<div class="memproto">
<div class="memtemplate">
template&lt;typename Scalar , bool isAdd&gt; </div>
<div class="memtemplate">
template&lt;int64_t endM, int64_t endN, bool rem = false&gt; </div>
<table class="mlabels">
  <tr>
  <td class="mlabels-left">
      <table class="memname">
        <tr>
          <td class="memname">static EIGEN_ALWAYS_INLINE void <a class="el" href="classunrolls_1_1gemm.html">unrolls::gemm</a>&lt; Scalar, isAdd &gt;::updateC </td>
          <td>(</td>
          <td class="paramtype">Scalar *&#160;</td>
          <td class="paramname"><em>C_arr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">int64_t&#160;</td>
          <td class="paramname"><em>LDC</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">PacketBlock&lt; vec, EIGEN_ARCH_DEFAULT_NUMBER_OF_REGISTERS &gt; &amp;&#160;</td>
          <td class="paramname"><em>zmm</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">int64_t&#160;</td>
          <td class="paramname"><em>rem_</em> = <code>0</code>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
  </td>
  <td class="mlabels-right">
<span class="mlabels"><span class="mlabel">inline</span><span class="mlabel">static</span></span>  </td>
  </tr>
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<p>Ideally the compiler folds these into vaddp{s,d} with an embedded memory load. </p>

</div>
</div>
<hr/>The documentation for this class was generated from the following file:<ul>
<li><a class="el" href="unrolls__impl_8hpp_source.html">unrolls_impl.hpp</a></li>
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